SH7606 Datasheet, PDF (323/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series

Section 12 Serial Communication Interface with FIFO (SCIF)
SCK2
Reset
R
QD
SCKIO
C
Bit 3
SPTRW
Reset
R
QD
SCKDT
C
Bit 2
SPTRW
Internal data bus
Clock output enable signal*
Sirial clock output signal*
Serial clock input signal*
Serial input enable signal*
SPTRW:
SPTRR:
SCSPTR write
SCSPTR read
SPTRR
Note: * These signals control the SCK pin according to the settings of the C/A bit in SCSMR
and bits CKE1 and CKE0 in SCSCR.
Figure 12.21 SCKIO Bit, SCKDT Bit, and SCK Pin
Reset
R
QD
SPBIO
C
Bit 1
SPTRW
Internal data bus
Reset
TxD
R
Bit 0
QD
SPBDT
C
SPTRW
Transmit enable signal
Serial transmit data
SPTRW: SCSPTR write
Figure 12.22 SPBIO Bit, SPBDT Bit, and TxD Pin
Rev. 4.00 Sep. 13, 2007 Page 297 of 502
REJ09B0239-0400