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SH7606 Datasheet, PDF (283/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series | |||
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Section 12 Serial Communication Interface with FIFO (SCIF)
12.3.8 Bit Rate Register (SCBRR)
SCBRR is an 8-bit register that, together with the baud rate generator clock source selected by the
CKS1 and CKS0 bits in the serial mode register (SCSMR), determines the serial transmit/receive
bit rate.
The CPU can always read and write to SCBRR. SCBRR is initialized to H'FF by a power-on reset.
Each channel has independent baud rate generator control, so different values can be set in three
channels.
The SCBRR setting is calculated as follows:
⢠Asynchronous mode:
N=
PÏ
64 Ã 22n-1 Ã B
Ã
106
-1
⢠Synchronous mode:
N=
PÏ
à 106 - 1
8 Ã 22n-1 Ã B
B: Bit rate (bits/s)
N: SCBRR setting for baud rate generator (0 ⤠N ⤠255)
(The setting value should satisfy the electrical characteristics.)
PÏ: Operating frequency for peripheral modules (MHz)
n: Baud rate generator clock source (n = 0, 1, 2, 3) (for the clock sources and values of
n, see table 12.2.)
Rev. 4.00 Sep. 13, 2007 Page 257 of 502
REJ09B0239-0400
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