SH7606 Datasheet, PDF (218/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series

Section 7 Bus State Controller (BSC)
both the DMA source and destination addresses exist in external memory space, the next write
cycle will not be initiated until the previous write cycle is completed.
On-Chip Peripheral Module Access: To access an on-chip module register, two or more
peripheral module clock (Pφ) cycles are required. Care must be taken in system design.
Rev. 4.00 Sep. 13, 2007 Page 192 of 502
REJ09B0239-0400