SH7606 Datasheet, PDF (160/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series

Section 7 Bus State Controller (BSC)
Initial
Bit
Bit Name Value R/W Description
2

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
1
WTRC1 0
R/W Idle Cycle Number from REF Command/Self-Refreshing
0
WTRC0 0
R/W ^{Release to ACTV/REF/MRS Command}
Specify the number of minimum idle cycles in the
following cases.
• From the issuing of the REF command to the issuing
of the ACTV/REF/MRS command.
• From the self-refreshing release to the issuing of the
ACTV/REF/MRS command.
00: 2 cycles
01: 3 cycles
10: 5 cycles
11: 8 cycles
Rev. 4.00 Sep. 13, 2007 Page 134 of 502
REJ09B0239-0400