SH7606 Datasheet, PDF (296/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series

Section 12 Serial Communication Interface with FIFO (SCIF)
Initial
Bit
Bit Name value
R/W Description
2
SCKDT *
R/W SCK Port Data
Controls the SCK pin in combination with the SCKIO bit
in this register, the C/A bit in SCSMR, and bits CKE1
and CKE0 in SCSCR. Select the SCK pin function in
the PFC (pin function controller) beforehand.
C/A CKE1 CKE0 SCKIO SCKDT: SCK pin state
00
0
0
×:
Input (initial state)
00
0
0
0:
Low level output
00
0
1
1:
High level output
00
1
×
×:
Internal clock output
according to serial core
logic
01
0
×
×:
External clock input to
serial core logic
01
1
×
×:
Setting prohibited
10
0
×
×:
Internal clock output
according to serial core
10
1
×
×:
logic
Internal clock output
according to serial core
11
0
×
×:
11
1
×
×:
logic
External clock input to
serial core logic
Setting prohibited
×: Don't care
The SCK pin state is read from this bit instead of the
set value.
1
SPBIO 0
R/W Serial Port Break Input/Output Control
Controls the TxD pin in combination with the SPBDT bit
in this register and the TE bit in SCSCR.
Rev. 4.00 Sep. 13, 2007 Page 270 of 502
REJ09B0239-0400