SH7606 Datasheet, PDF (391/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series

Section 15 I/O Ports
15.2 Port B
Port B of this LSI is an I/O port with 14 pins as shown in figure 15.2.
Port B
PB00 (input/output)/WAIT (input)
PB01 (input/output)/IOIS16 (input)
PB02 (input/output)/CKE (output)
PB03 (input/output)/CAS (output)
PB04 (input/output)/RAS (output)
PB05 (input/output)/ICIORD (output)
PB06 (input/output)/ICIOWR (output)
PB07 (input/output)/CE2B (output)
PB08 (input/output)/CS6B (output)/CE1B (output)
PB09 (input/output)/CE2A (output)
PB10 (input/output)/CS5B (output)/CE1A (output)
PB11 (input/output)/CS4 (output)
PB12 (input/output)/CS3 (output)
PB13 (input/output)/BS (output)
Figure 15.2 Port B
15.2.1 Register Description
Port B is a 14-bit I/O port that has a following register. For details on the address of this register
and the states of this register in each processing state, see section 18, List of Registers.
• Port B data register L (PBDRL)
15.2.2 Port B Data Register L (PBDRL)
PBDRL is a 16-bit readable/writable register which stores data for port B. Bits PB13DR to
PB0DR correspond to pins PB13 to PB00. (Description of multiplexed functions is omitted.)
When the pin function is general output port, if the value is written to PBDRL, the value is output
from the pin; if PBDRL is read, the value written to the register is directly read regardless of the
pin state.
Rev. 4.00 Sep. 13, 2007 Page 365 of 502
REJ09B0239-0400