SH7606 Datasheet, PDF (142/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series

Section 7 Bus State Controller (BSC)
7.4.1 Common Control Register (CMNCR)
CMNCR is a 32-bit register that controls the common items for each area. Do not access external
memory other than area 0 until setting CMNCR is complete.
Initial
Bit
Bit Name Value R/W
31 to 13 
All 0 R
12
MAP
0
R/W
11 to 5 
All 0 R
4

1
R
3
ENDIAN 0/1* R
2

1
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Space Specification
Selects the address map for the external address space.
The address maps to be selected are shown in tables 7.2
and 7.3.
0: Selects address map 1
1: Selects address map 2
Reserved
These bits are always read as 0. The write value should
always be 0.
Reserved
This bit is always read as 1. The write value should
always be 1.
Endian Flag
Fetches the external pin (MD5) state for specifying
endian at a power-on reset. The endian setting for all the
address spaces are set by this bit. This is a read-only bit.
0: External pin (MD5) for specifying endian was driven
low at a power-on reset. This LSI is operated as big
endian.
1: External pin (MD5) for specifying endian was driven
high at a power-on reset. This LSI is being operated
as little endian.
Reserved
This bit is always read as 1. The write value should
always be 1.
Rev. 4.00 Sep. 13, 2007 Page 116 of 502
REJ09B0239-0400