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SH7606 Datasheet, PDF (487/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series
Section 19 Electrical Characteristics
CKIO
A25 to A0
A11*
Td1
Td2
Td3
Td4
Tr
Trw
Tc1
Tc2
Tc3
Tc4
Tde
tAD1
Row
address
tAD1
tAD1
tAD1
tAD1
Column
address
Column
address
Column
address
Column
address
tAD1
tAD1
Read command
tAD1
tAD1
Read A command
tAD1
CSn
RD/WR
RAS
CAS
DQMxx
tCSD1
tRWD
tRASD
tRASD
tCASD
tDQMD
D15 to D0
tBSD
BS
tCSD1
tRWD
tCASD
tDQMD
tRDS2
tRDH2
tRDS2 tRDH2
tBSD
CKE
(High)
Note: * An address pin connected to pin A10 of SDRAM
Figure 19.19 Synchronous DRAM Burst Read Bus Cycle (Single Read × 4)
(Auto-Precharge, CAS Latency = 2, WTRCD = 1 Cycle, WTRP = 0 Cycle)
Rev. 4.00 Sep. 13, 2007 Page 461 of 502
REJ09B0239-0400