SH7606 Datasheet, PDF (493/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series

Section 19 Electrical Characteristics
CKIO
A25 to A0
A11^*
Td1
Td2
Td3
Td4
Tc1
Tc2
Tc3
Tc4
Tde
t_AD1
t_AD1
t_AD1
t_AD1
Column
address
Column
address
Column
address
t_AD1
Read command
Column
address
t_AD1
t_AD1
CSn
RD/WR
RAS
CAS
DQMxx
t_CSD1
t_RWD
t_RASD
t_CASD
t_DQMD
t_CSD1
t_RWD
t_CASD
t_DQMD
D15 to D0
t_BSD
BS
t_RDS2 t_RDH2
t_BSD
t_RDS2 t_RDH2
CKE
(High)
Note: * An address pin connected to pin A10 of SDRAM
Figure 19.25 Synchronous DRAM Burst Read Bus Cycle (Single Read × 4)
(Bank Active Mode: READ Command, Same Row Address, CAS Latency = 2,
WTRCD = 0 Cycle)
Rev. 4.00 Sep. 13, 2007 Page 467 of 502
REJ09B0239-0400