SH7606 Datasheet, PDF (369/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series

Section 14 Pin Function Controller (PFC)
14.1 Register Descriptions
The PFC has the following registers. For details on the addresses of these registers and the states
of these registers in each processing state, see section 18, List of Registers.
• Port A IO register H (PAIORH)
• Port A control register H1 (PACRH1)
• Port A control register H2 (PACRH2)
• Port B IO register L (PBIORL)
• Port B control register L1 (PBCRL1)
• Port B control register L2 (PBCRL2)
• Port C IO register H (PCIORH)
• Port C IO register L (PCIORL)
• Port D IO register L (PDIORL)
• Port D control register L2 (PDCRL2)
• Port E IO register H (PEIORH)
• Port E IO register L (PEIORL)
• Port E control register H1 (PECRH1)
• Port E control register H2 (PECRH2)
• Port E control register L1 (PECRL1)
• Port E control register L2 (PECRL2)
14.1.1 Port A IO Register H (PAIORH)
PAIORH is a 16-bit readable/writable register that selects the input/output directions of the port A
pins. Bits PA25IOR to PA16IOR correspond to pins PA25 to PA16 (the pin name abbreviations
for multiplexed functions are omitted). PAIORH is enabled when a port A pin functions as a
general input/output (PA25 to PA16), otherwise, disabled.
Setting a bit in PAIORH to 1 makes the corresponding pin function as an output and clearing a bit
in PAIORH to 0 makes the pin function as an input.
Bits 15 to 10 in PAIORH are reserved. These bits are always read as 0. The write value should
always be 0.
The initial value of PAIORH is H'0000.
Rev. 4.00 Sep. 13, 2007 Page 343 of 502
REJ09B0239-0400