MC68HC912BD32 Datasheet, PDF (87/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
EEPROM
EEPROM Control Registers
The SHADOW byte can be protected from being programmed or erased
by setting the SHPROT bit of EEPROT register.
EEPROM Control Registers
EEMCR — EEPROM Module Configuration
Bit 7
6
5
4
3
NOBDML NOSHB
RESERVED⁽¹⁾
1
RESET:
—⁽²⁾
—
—
—
1
1. Bits 4 and 5 have test functions and should not be programmed.
2. Loaded from SHADOW byte.
2
1
EESWAI PROTLCK
1
0
Bit 0
EERC
0
$00F0
Bits[7:4] are loaded at reset from the EEPROM SHADOW byte.
NOTE:
The bits 5 and 4 are reserved for test purposes. These locations in
SHADOW byte should not be programmed otherwise some locations of
regular EEPROM array will be no more visible.
NOBDML — Background Debug Mode Lockout Disable
0 = The BDM lockout is enabled.
1 = The BDM lockout is disabled.
Loaded from SHADOW byte at reset.
Read anytime. Write anytime in special modes (SMODN=0).
NOSHB — SHADOW Byte Disable
0 = The SHADOW byte enabled and accessible at address $0FC0.
1 = Regular EEPROM array at address $0FC0.
Loaded from SHADOW byte at reset.
Read anytime. Write anytime in special modes (SMODN=0).
When NOSHB cleared, the regular EEPROM array byte at address
$0FC0 is no more visible. The SHADOW byte is accessed instead for
both read and program/erase operations. BULK, ODD and EVEN
program/erase only applies if SHADOW byte is enabled.
NOTE: The bit 6 in SHADOW byte should not be programmed in order to have
the full EEPROM array visible.
3-eeprom
EEPROM
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MC68HC912BD32 Rev 1.0