MC68HC912BD32 Datasheet, PDF (162/292 Pages) Freescale Semiconductor, Inc – Advance Information

Serial Interface
Freescale Semiconductor, Inc.
Transfer
Begin
End
SCK (CPOL=0)
SCK (CPOL=1)
SAMPLE I
(MOSI/MISO)
CHANGE O
(MOSI pin)
CHANGE O
(MISO pin)
SEL SS (O)
(Master only)
SEL SS (I)
t_L
MSB first (LSBF=0):
LSB first (LSBF=1):
MSB
LSB
Bit 6
Bit 1
Bit 5
Bit 2
Bit 4
Bit 3
Bit 3
Bit 4
Bit 2
Bit 5
Bit 1
Bit 6
t_T t_I t_L
LSB Minimum 1/2 SCK
MSB
for t_T, t_l, t_L
Figure 23 SPI Clock Format 1 (CPHA = 1)
SS Output
Available in master mode only, SS output is enabled with the SSOE bit
in the SP0CR1 register if the corresponding DDRS bit is set. The SS
output pin will be connected to the SS input pin of the external slave
device. The SS output automatically goes low for each transmission to
select the external device and it goes high during each idling state to
deselect external devices.
DDS7
0
0
1
1
Table 31 SS Output Selection
SSOE
0
1
0
1
Master Mode
SS Input with MODF Feature
Reserved
General-Purpose Output
SS Output
Slave Mode
SS Input
SS Input
SS Input
SS Input
MC68HC912BD32 Rev 1.0
Serial Interface
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