MC68HC912BD32 Datasheet, PDF (216/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Byteflight™ Module
FIFO Identifier
Acceptance
Register(FIDAC)
The FIFO identifier acceptance register defines a user specified
sequence of bits with which the incoming identifier is compared. This
determines whether the message is accepted by the FIFO. Only a hard
reset will clear the register.
FIDAC
R
$xx0C
W
HARDRESET
BIT 7
FIDAC7*
0
BIT 6
FIDAC6*
0
BIT 5
FIDAC5*
0
BIT 4
FIDAC4*
0
BIT 3
FIDAC3*
0
BIT 2
FIDAC2*
0
Figure 48 FIFO Identifier Acceptance Register
BIT 1
FIDAC1*
0
BIT 0
FIDAC0*
0
NOTE: The FIDAC register can only be written if the SFTRES bit in the Module
Configuration register is set.
FIFO Identifier
Mask Register
(FIDMR)
The identifier mask register specifies which of the corresponding bits in
the identifier acceptance register are relevant for acceptance filtering. A
cleared bit in this register indicates that the corresponding bit in the
identifier acceptance register must be the same as the incoming
identifier bit, before a match will be detected. The message will be
accepted by the FIFO if all such bits match. If a bit is set, it indicates that
the state of the corresponding bit in the identifier acceptance register will
not affect whether or not the message is accepted by the FIFO. Only a
hard reset will clear the register.
Bit description:
1 = Ignore corresponding acceptance register bit
0 = Match corresponding acceptance register bit
FIDMR
R
$xx0D
W
HARDRESET
BIT 7
FIDMR7*
0
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
FIDMR6* FIDMR5* FIDMR4* FIDMR3* FIDMR2*
0
0
0
0
0
Figure 49 FIFO Identifier Mask Register
BIT 1
FIDMR1*
0
BIT 0
FIDMR0*
0
NOTE: The FIDMR register can only be written if the SFTRES bit in the Module
Configuration register is set.
MC68HC912BD32 Rev 1.0
Byteflight™ Module
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46-sibus