MC68HC912BD32 Datasheet, PDF (52/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Operating Modes and Resource Mapping
Normal modes: write once; Special modes: write anytime, read
anytime.
IVIS — Internal Visibility
This bit determines whether internal ADDR/DATA, R/W, and LSTRB
signals can be seen on the bus during accesses to internal locations.
In special expanded narrow mode, it is possible to configure the MCU
to show internal accesses on an external 16-bit bus. The IVIS control
bit must be set to 1. When the system is configured this way, visible
internal accesses are shown as if the MCU was configured for
expanded wide mode but normal external accesses operate as if the
bus was in narrow mode. In normal expanded narrow mode, internal
visibility is not allowed and IVIS is ignored.
0 = No visibility of internal bus operations on external bus
1 = Internal bus operations are visible on external bus
Normal modes: write once; Special modes: write anytime EXCEPT
the first time. Read anytime.
EBSWAI — External Bus Module Stop in Wait Control
This bit controls access to the external bus interface when in Wait
mode. The module will delay before shutting down in Wait mode to
allow for final bus activity to complete.
0 = External bus and registers continue functioning during Wait
mode.
1 = External bus is shut down during Wait mode.
EME — Emulate Port E
Removing the registers from the map allows the user to emulate the
function of these registers externally. In single-chip mode PORTE and
DDRE are always in the map regardless of the state of this bit.
0 = PORTE and DDRE are in the memory map.
1 = PORTE and DDRE are removed from the internal memory map
(expanded mode).
Normal modes: write once; special modes: write anytime EXCEPT
the first time. Read anytime.
MC68HC912BD32 Rev 1.0
Operating Modes and Resource Mapping
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6-mode