MC68HC912BD32 Datasheet, PDF (169/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Serial Interface
Port S
DDS0 — Data Direction for Port S, Bit 0
If the SCI receiver is configured for two-wire SCI operation,
corresponding port S pins will be input regardless of the state of these
bits.
DDS1 — Data Direction for Port S, Bit 1
If the SCI transmitter is configured for two-wire SCI operation,
corresponding port S pins will be output regardless of the state of
these bits.
DDS[2:3] — Data Direction for Port S Bit 2 and Bit 3
These bits are for general purpose I/O only.
DDS[6:4] — Data Direction for Port S Bits 6 through 4
If the SPI is enabled and expects the corresponding port S pin to be
an input, it will be an input regardless of the state of the DDRS bit. If
the SPI is enabled and expects the bit to be an output, it will be an
output only if the DDRS bit is set.
DDS7 — Data Direction for Port S Bit 7
In SPI slave mode, DDS7 has no meaning or effect; the PS7 pin is
dedicated as the SS input. In SPI master mode, DDS7 determines
whether PS7 is an error detect input to the SPI or a general-purpose
or slave select output line.
PURDS — Pullup and Reduced Drive for Port S
Bit 7
6
5
4
3
0
RDPS2 RDPS1 RDPS0
0
RESET:
0
0
0
0
0
2
PUPS2
0
1
PUPS1
0
Bit 0
PUPS0
0
$00DB
Read or write anytime.
RDPS2 — Reduce Drive of PS[7:4]
0 = Port S output drivers for bits 7 through 4 operate normally.
1 = Port S output pins for bits 7 through 4 have reduced drive
capability for lower power and less noise.
23-sint
Serial Interface
For More Information On This Product,
Go to: www.freescale.com
MC68HC912BD32 Rev 1.0