MC68HC912BD32 Datasheet, PDF (26/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Pinout and Signal Descriptions
Reset (RESET)
An active low bidirectional control signal, RESET, acts as an input to
initialize the MCU to a known start-up state. It also acts as an open-drain
output to indicate that an internal failure has been detected in either the
clock monitor or COP watchdog circuit. The MCU goes into reset
asynchronously and comes out of reset synchronously. This allows the
part to reach a proper reset state even if the clocks have failed, while
allowing synchronized operation when starting out of reset.
It is possible to determine whether a reset was caused by an internal
source or an external source. An internal source drives the pin low for 16
cycles; eight cycles later the pin is sampled. If the pin has returned high,
either the COP watchdog vector or clock monitor vector will be taken. If
the pin is still low, the external reset is determined to be active and the
reset vector is taken. Hold reset low for at least 32 cycles to assure that
the reset vector is taken in the event that an internal COP watchdog
time-out or clock monitor fail occurs.
Maskable
Interrupt Request
(IRQ)
The IRQ input provides a means of applying asynchronous interrupt
requests to the MCU. Either falling edge-sensitive triggering or
level-sensitive triggering is program selectable (INTCR register). IRQ is
always configured to level-sensitive triggering at reset. When the MCU
is reset the IRQ function is masked in the condition code register.
This pin is always an input and can always be read. There is an active
pull-up on this pin while in reset and immediately out of reset. The pullup
can be turned off by clearing PUPE in the PUCR register.
Nonmaskable
Interrupt (XIRQ)
The XIRQ input provides a means of requesting a nonmaskable interrupt
after reset initialization. During reset, the X bit in the condition code
register (CCR) is set and any interrupt is masked until MCU software
enables it. Because the XIRQ input is level sensitive, it can be connected
to a multiple-source wired-OR network. This pin is always an input and
can always be read. There is an active pull-up on this pin while in reset
and immediately out of reset. The pullup can be turned off by clearing
PUPE in the PUCR register. XIRQ is often used as a power loss detect
interrupt.
MC68HC912BD32 Rev 1.0
Pinout and Signal Descriptions
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6-pins