MC68HC912BD32 Datasheet, PDF (70/292 Pages) Freescale Semiconductor, Inc – Advance Information

Flash EEPROM
Freescale Semiconductor, Inc.
Overview
The Flash EEPROM array is arranged in a 16-bit configuration and may
be read as either bytes, aligned words or misaligned words. Access time
is one bus cycle for byte and aligned word access and two bus cycles for
misaligned word operations.
The Flash EEPROM module requires an external program/erase voltage
(V_FP) to program or erase the Flash EEPROM array. The external
program/erase voltage is provided to the Flash EEPROM module via an
external V_FP pin. To prevent damage to the flash array, V_FP should
always be greater than or equal to V_DD−0.5V. Programming is by byte or
aligned word. The Flash EEPROM module supports bulk erase only.
The Flash EEPROM module has hardware interlocks which protect
stored data from accidental corruption. An erase- and
program-protected 2K byte block for boot routines is located at
$7800–$7FFF or $F800–$FFFF depending upon the mapped location of
the Flash EEPROM array.
Flash EEPROM Control Block
A 4-byte register block controls the Flash EEPROM module operation.
Configuration information is specified and programmed independently
from the contents of the Flash EEPROM array. At reset, the 4-byte
register section starts at address $00F4.
Flash EEPROM Array
After reset, the Flash EEPROM array is located from addresses $8000
to $FFFF in single-chip mode. In Expanded modes the Flash EEPROM
array is located from address $0000 to $7FFF, however, it is turned off.
The Flash EEPROM can be mapped to an alternate address range. See
Operating Modes.
MC68HC912BD32 Rev 1.0
Flash EEPROM
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