MC68HC912BD32 Datasheet, PDF (56/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Operating Modes and Resource Mapping
MISC — Miscellaneous Mapping Control Register
$0013
Bit 7
6
5
4
3
2
1
Bit 0
0
NDRF RFSTR1 RFSTR0 EXSTR1 EXSTR0 MAPROM ROMON
RESET:
0
0
0
0
1
1
0
0
Ex. mode
0
0
0
0
1
1
1
1
SIngle-chi
p mode
This register can be read anytime. In Normal modes MISC can be written
once; in Special modes it can be written anytime.
NDRF — Narrow Data Bus for Register-Following Map
This bit enables a narrow bus feature for the 512-byte
register-following map. In Expanded Narrow (eight bit) modes, Single
Chip modes, and Peripheral mode, NDRF has no effect. The
register-following map always begins at the byte following the
512-byte register map. If the registers are moved this space will also
move.
0 = Register-following map space acts as a full 16-bit data bus
1 = Register-following map space acts the same as an 8-bit
external data bus
RFSTR1, RFSTR0 — Register-Following Stretch Bit 1 and Bit 0
These bits determine the amount of clock stretch on accesses to the
512-byte register-following map. It is valid regardless of the state of
the NDRF bit. In Single Chip and Peripheral modes this bit has no
meaning or effect.
Table 12 Register-Following Stretch-Bit Definition
Stretch bit RFSTR1
0
0
1
1
Stretch bit RFSTR0
0
1
0
1
E Clocks Stretched
0
1
2
3
EXSTR1, EXSTR0 — External Access Stretch Bit1 and Bit0
These bits determine the amount of clock stretch on accesses to the
external address space. In Single Chip and Peripheral modes this bit
has no meaning or effect.
MC68HC912BD32 Rev 1.0
Operating Modes and Resource Mapping
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10-mode