MC68HC912BD32 Datasheet, PDF (61/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Bus Control and Input/Output
Registers
PORTA — Port A Register
Bit 7
6
5
4
3
2
Single Chip PA7
PA6
PA5
PA4
PA3
PA2
RESET:
–
–
–
–
–
–
Exp Wide ADDR15 ADDR14 ADDR13 ADDR12 ADDR11 ADDR10
& Periph: DATA15 DATA14 DATA13 DATA12 DATA11 DATA10
Expanded ADDR15 ADDR14 ADDR13 ADDR12 ADDR11 ADDR10
Narrow DATA15/7 DATA14/6 DATA13/5 DATA12/4 DATA11/3 DATA10/2
1
PA1
–
ADDR9
DATA9
ADDR9
DATA9/1
$0000
Bit 0
PA0
–
ADDR8
DATA8
ADDR8
DATA8/0
Bits PA[7:0] are associated with addresses ADDR[15:8] and
DATA[15:8]. When this port is not used for external addresses and data,
such as in single-chip mode, these pins can be used as general-purpose
I/O. DDRA determines the primary direction of each pin. This register is
not in the on-chip map in expanded and peripheral modes. Read and
write anytime.
DDRA — Port A Data Direction Register
Bit 7
6
5
DDA7
DDA6
DDA5
RESET:
0
0
0
4
DDA4
0
3
DDA3
0
2
DDA2
0
1
DDA1
0
$0002
Bit 0
DDA0
0
This register determines the primary direction for each port A pin when
functioning as a general-purpose I/O port. DDRA is not in the on-chip
map in expanded and peripheral modes. Read and write anytime.
0 = Associated pin is a high-impedance input
1 = Associated pin is an output
PORTB — Port B Register
Bit 7
6
Single Chip PB7
PB6
RESET:
–
–
Exp Wide
& Periph:
ADDR7
DATA7
ADDR6
DATA6
Expanded
Narrow
ADDR7
ADDR6
5
PB5
–
ADDR5
DATA5
ADDR5
4
PB4
–
ADDR4
DATA4
ADDR4
3
PB3
–
ADDR3
DATA3
ADDR3
2
PB2
–
ADDR2
DATA2
ADDR2
1
PB1
–
ADDR1
DATA1
ADDR1
$0001
Bit 0
PB0
–
ADDR0
DATA0
ADDR0
3-bus
Bus Control and Input/Output
For More Information On This Product,
Go to: www.freescale.com
MC68HC912BD32 Rev 1.0