MC68HC912BD32 Datasheet, PDF (186/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Byteflight™ Module
Error Handling
The serial bus interface module detects and handles the following types
of errors:
Table 37 Error Handling
Error Type
Error Description
Error Handling
Message Format Error
Incorrect CRC, incorrect START bit or STOP bit
(Frame), missing or corrupted message start
sequence, bus-activity during the bus idle time
or before expiry of (t_cyc_min - t_syn_n) since
the last correct sync pulse: dominant pulse of
length t: t_start_seq < t < t_syn_a_min
The node is still synchronized.
Transmission and reception is
possible after t_idle_min.
Set flag and generate interrupt if
enabled.
A pulse has not the required position of an
SYNC Pulse Too Early Error ALARM or NORMAL pulse, the pulse appears
too early
SYNC pulse is used for
synchronization. Set flag and
generate interrupt if enabled.
SYNC Pulse Lost Error
No valid SYNC pulse detected until end of cycle
t_cyc_max
No transmission or reception
until the next correct SYNC
pulse. Set flag and generate
interrupt if enabled.
Illegal Pulse Error
Before expiry of (t_cyc_min - t_syn_n) since the
last correct sync pulse: dominant pulse of length
t detected on the bus:
t_syn_a_max < t < t_syn_n_min
or
t > t_syn_n_max
after expiry of (t_cyc_min - t_syn_n) since the
last correct sync pulse: all dominant pulses
which are not correct sync-normal or
sync-alarm pulses lead to this error
No transmission or reception
until the next correct SYNC
pulse.
Set flag and generate interrupt if
enabled.
The Rx pin of the serial bus interface module is internally connected to
its own Tx pin during Tx activity and for 8*t_bit after last Tx activity (to
avoid receiving of echoes).
SYNC Pulse
Detection
A Sync Pulse is defined as a continuous dominant pulse with :
t_syn_a_min < t_syn_a < t_syn_a_max or
t_syn_n_min < t_syn_n < t_syn_n_max
Any dominant pulse within the wait times t_wx, t_w0 - t_syn_n_max is
considered as an error. If this pulse has a valid SYNC length the cycle is
restarted and a SYNC too early error is set. If the pulse has not a valid
length an illegal pulse error or a message format error is issued (see
MC68HC912BD32 Rev 1.0
Byteflight™ Module
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