MC68HC912BD32 Datasheet, PDF (62/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Bus Control and Input/Output
Bits PB[7:0] are associated with addresses ADDR[7:0] and DATA[7:0].
When this port is not used for external addresses and data such as in
single-chip mode, these pins can be used as general-purpose I/O.
DDRB determines the primary direction of each pin. This register is not
in the on-chip map in expanded and peripheral modes. Read and write
anytime.
DDRB — Port B Data Direction Register
Bit 7
6
5
DDB7
DDB6
DDB5
RESET:
0
0
0
4
DDB4
0
3
DDB3
0
2
DDB2
0
1
DDB1
0
$0003
Bit 0
DDB0
0
This register determines the primary direction for each port B pin when
functioning as a general-purpose I/O port. DDRB is not in the on-chip
map in expanded and peripheral modes. Read and write anytime.
0 = Associated pin is a high-impedance input
1 = Associated pin is an output
PORTE — Port E Register
Bit 7
6
5
4
3
2
Single Chip PE7
PE6
PE5
PE4
PE3
PE2
RESET:
–
–
–
–
–
–
Alt. Pin
Function
DBE
MODB or MODA or
IPIPE1 IPIPE0
ECLK
LSTRB or
TAGLO
R/W
$0008
1
Bit 0
PE1
PE0
–
–
IRQ
XIRQ
This register is associated with external bus control signals and interrupt
inputs including data bus enable (DBE), mode select (MODB/IPIPE1,
MODA/IPIPE0), E clock, data size (LSTRB/TAGLO), read/write (R/W),
IRQ, and XIRQ. When the associated pin is not used for one of these
specific functions, the pin can be used as general-purpose I/O. The port
E assignment register (PEAR) selects the function of each pin. DDRE
determines the primary direction of each port E pin when configured to
be general-purpose I/O.
Some of these pins have software selectable pull-ups (DBE, LSTRB,
R/W, and XIRQ). A single control bit enables the pull-ups for all these
pins which are configured as inputs. IRQ always has a pull-up.
MC68HC912BD32 Rev 1.0
Bus Control and Input/Output
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