MC68HC912BD32 Datasheet, PDF (193/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Byteflight™ Module
Programmer’s Model
Programmer’s Model
This section describes the content and use of the registers in the serial
bus interface module. An overview of all registers is shown in Figure 33.
There are three sets of registers which are accessible by the CPU:
• the general control registers,
• the 16 buffer control registers,
• and the 16 configurable message buffers with one 14 bytes active
transmit buffer, one 14 bytes active receive buffer and one 14
bytes active receive FIFO buffer mirrored to the memory map.
$xx00
$xx1F
$xx20
$xx2F
GENERAL CONTROL
32 BYTES
ACTIVE TRANSMIT BUFFER
14 BYTES
LOCK
LOCK
$xx40
$xx4F
$xx50
$xx5F
ACTIVE RECEIVE FIFO BUFFER
14 BYTES
BUFFER CONTROL
16 BYTES
GETIDX
16 of 18 message buffers are accessible by window
scheme
BUFFER 17 - 14 BYTES
BUFFER 16 - 14 BYTES
BUFFER 15 - 14 BYTES
↓Transmit
BUFFER 2 - 14 BYTES
BUFFER 1 - 14 BYTES
BUFFER 0 - 14 BYTES
assignment of buffers
⇐ PUTIDX
↑Receive, FIFO
Figure 33 Register Map
23-sibus
Byteflight™ Module
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MC68HC912BD32 Rev 1.0