MC68HC912BD32 Datasheet, PDF (34/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Pinout and Signal Descriptions
When the PUPT bit in the TMSK2 register is set, all input pins are pulled
up internally by an active pull-up device. Pullups are disabled after reset.
Setting the RDPT bit in the TMSK2 register configures all port T outputs
to have reduced drive levels. Levels are at normal drive capability after
reset. The TMSK2 register can be read or written anytime after reset
Refer to Standard Timer Module.
Port S
Port S is the 8-bit interface to the standard serial interface consisting of
the serial communications interface (SCI) and serial peripheral interface
(SPI) subsystems. Port S pins are available for general-purpose parallel
I/O when standard serial functions are not enabled.
Port S pins serve several functions depending on the various internal
control registers. If WOMS bit in the SC0CR1register is set, the
P-channel drivers of the output buffers are disabled for bits 0 through 1
(2 through 3). If SWOM bit in the SP0CR1 register is set, the P-channel
drivers of the output buffers are disabled for bits 4 through 7. (wired-OR
mode). The open drain control effects to both the serial and the
general-purpose outputs. If the RDPSx bits in the PURDS register are
set, the appropriate Port S pin drive capabilities are reduced. If PUPSx
bits in the PURDS register are set, the appropriate pull-up device is
connected to each port S pin which is programmed as a general-purpose
input. If the pin is programmed as a general-purpose output, the pull-up
is disconnected from the pin regardless of the state of the individual
PUPSx bits. See Serial Interface.
Port
Name
Port A
PA[7:0]
Port B
PB[7:0]
Port AD
PAD[7:0]
Table 7 MC68HC912BD32 Port Description Summary
Pin
Numbers
46–39
25–18
Data Direction
DD Register
(Address)
In/Out
DDRA ($0002)
In/Out
DDRB ($0003)
Description
Port A and port B pins are used for address and data in
expanded modes. The port data registers are not in the
address map during expanded and peripheral mode operation.
When in the map, port A and port B can be read or written any
time.
DDRA and DDRB are not in the address map in expanded or
peripheral modes.
58–51
In
Analog-to-digital converter and general-purpose I/O.
MC68HC912BD32 Rev 1.0
Pinout and Signal Descriptions
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