MC68HC912BD32 Datasheet, PDF (183/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Byteflight™ Module
Functional Overview
PUTIDX
(WRITE)
PUTIDX
(WRITE)
PUTIDX
(WRITE)
BUFFERS: 0 1 2
MESSAGES: - - -
BUFFERS: 0 1 2
MESSAGES: A - -
BUFFERS: 0 1 2
MESSAGES: A B C
GETIDX
(READ)
FIFO EMPTY
GETIDX
(READ)
FIFO NOT EMPTY
GETIDX
(READ)
PUTIDX WAS INCREMENTED LAST
+ NEW INCOMING MESSAGE (WHICH
IS LOSTF)IFO _OVERRUN
Figure 31 FIFO Status (empty, not empty, overrun) - Example with 3 buffers
To read a Receive FIFO buffer the FIFO must be locked by setting the
LOCK bit of buffer 0. The message buffer addressed by GETIDX
appears in the Active Receive FIFO Buffer window in the memory map.
After reading the FIFO must be unlocked and the GETIDX will be
incremented.
There is a programmable identifier acceptance filter for the Receive
FIFO system. The FIFO identifier acceptance register (FIDAC) defines
the acceptable pattern of the identifier to be received. The FIFO identifier
mask register (FIDMR) specifies which of the corresponding bits are
marked ‘don’t care’ for acceptance filtering.
There is also a programmable identifier rejection filter for the Receive
FIFO system. The FIFO identifier rejection register (FIDRJ) defines the
acceptable pattern of the identifier to be rejected. The FIFO identifier
rejection mask register (FIDRMR) specifies which of the corresponding
bits are marked ‘don’t care’ for rejection filtering.
If acceptance and rejection filter are configured to match the same
identifier, the message will be rejected.
13-sibus
Byteflight™ Module
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MC68HC912BD32 Rev 1.0