MC68HC912BD32 Datasheet, PDF (128/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Pulse Width Modulator
PORTPP — Port P Data Register
Bit 7
6
5
PP7
PP6
PP5
PWM
–
–
–
RESET:
–
–
–
$0056
4
3
2
1
Bit 0
PP4
PP3
PP2
PP1
PP0
–
PWM3 PWM2 PWM1 PWM0
–
–
–
–
–
PWM functions share port P pins 3 to 0 and take precedence over the
general-purpose port when enabled.
READ: any time (input configured pin return pin level; output
configured pin return internal latch pin driver input level.
WRITE: Data stored in an internal latch (drives pins only if configured
for output and corresponding PWM channel not enabled).
NOTE:
Writes do not change pin state when pin is configured for PWM outputs,
only after the PWM channel becomes available on port P pin, see PWEN
bit description.
PORTPD — Port P Data Direction Register
Bit 7
6
5
4
DDP7 DDP6 DDP5 DDP4
RESET:
0
0
0
0
.
3
DDP3
0
2
DDP2
0
1
DDP1
0
$0057
Bit 0
DDP0
0
This register determines whether each pin is input or output when it is
selected to be a general purpose I/O pin. Reading Port P Data Register
always follows pin data associated with he Port P Data Direction bit.
Read and write any time.
DDRP[7:0] — Data Direction Port P pins
0 = Configure I/O pin for input only
1 = Configure I/O for output
MC68HC912BD32 Rev 1.0
Pulse Width Modulator
For More Information On This Product,
Go to: www.freescale.com
16-pwm