MC68HC912BD32 Datasheet, PDF (140/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Standard Timer Module
TFLG2 — Timer Interrupt Flag 2
$008F
Bit 7
6
5
4
3
2
1
Bit 0
TOF
0
0
0
0
0
0
0
RESET:
0
0
0
0
0
0
0
0
TFLG2 indicates when interrupt conditions have occurred. To clear a
bit in the flag register, set the bit to one.
Read anytime. Write used in clearing mechanism (bits set cause
corresponding bits to be cleared).
Any access to TCNT will clear TFLG2 register if the TFFCA bit in
TSCR register is set.
TOF — Timer Overflow Flag
Set when 16-bit free-running timer overflows from $FFFF to $0000.
This bit is cleared automatically by a write to the TFLG2 register with
bit 7 set. (See also TCRE control bit explanation.)
MC68HC912BD32 Rev 1.0
Standard Timer Module
For More Information On This Product,
Go to: www.freescale.com
10-timer