MC68HC912BD32 Datasheet, PDF (168/292 Pages) Freescale Semiconductor, Inc – Advance Information

Serial Interface
Freescale Semiconductor, Inc.
Note that some slave devices are very simple and either accept data
from the master without returning data to the master or pass data to
the master without requiring data from the master.
Port S
In all modes, port S bits PS[7:0] can be used for either general-purpose
I/O, or with the SCI and SPI subsystems. During reset, port S pins are
configured as high-impedance inputs (DDRS is cleared).
PORTS — Port S Data Register
Bit 7
6
5
4
3
PS7
PS6
PS5
PS4
PS3
Pin
SS
Function CS
SCK
MOSI
MOMI
MISO
SISO
I/O
$00D6
2
1
Bit 0
PS2
PS1
PS0
I/O
TXD0 RXD0
PORTS can be read anytime. When configured as an input, a read will
return the pin level. When configured as output, a read will return the
latched output data. Writes do not change pin state when pin
configured for SPI or SCI output.
After reset all bits are configured as general-purpose inputs.
Port S shares function with the on-chip serial systems (SPI0 and
SCI0).
DDRS — Data Direction Register for Port S
Bit 7
6
5
4
DDS7 DDS6 DDS5 DDS4
RESET:
0
0
0
0
3
DDS3
0
2
DDS2
0
1
DDS1
0
Bit 0
DDS0
0
$00D7
Read or write anytime.
After reset, all general-purpose I/O are configured for input only.
0 = Configure the corresponding I/O pin for input only
1 = Configure the corresponding I/O pin for output
MC68HC912BD32 Rev 1.0
Serial Interface
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Go to: www.freescale.com
22-sint