MC68HC912BD32 Datasheet, PDF (159/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Serial Interface
Serial Peripheral Interface (SPI)
R7/T7–R0/T0 — Receive/Transmit Data Bits 7 to 0
Reads access the eight bits of the read-only SCI receive data register
(RDR). Writes access the eight bits of the write-only SCI transmit data
register (TDR). SC0DRL:SC0DRH form the 9-bit data word for the
SCI. If the SCI is being used with a 7- or 8-bit data word, only SC0DRL
needs to be accessed. If a 9-bit format is used, the upper register
should be written first to ensure that it is transferred to the transmitter
shift register with the lower register.
Serial Peripheral Interface (SPI)
The serial peripheral interface allows the MC68HC912BD32 to
communicate synchronously with peripheral devices and other
microprocessors. The SPI system in the MC68HC912BD32 can operate
as a master or as a slave. The SPI is also capable of interprocessor
communications in a multiple master system.
When the SPI is enabled, all pins that are defined by the configuration
as inputs will be inputs regardless of the state of the DDRS bits for those
pins. All pins that are defined as SPI outputs will be outputs only if the
DDRS bits for those pins are set. Any SPI output whose corresponding
DDRS bit is cleared can be used as a general-purpose input.
A bidirectional serial pin is possible using the DDRS as the direction
control.
SPI Baud Rate
Generation
The P clock is input to a divider series and the resulting SPI clock rate
may be selected to be P divided by 2, 4, 8, 16, 32, 64, 128 or 256. Three
bits in the SP0BR register control the SPI clock rate. This baud rate
generator is activated only when SPI is in the master mode and serial
transfer is taking place. Otherwise this divider is disabled to save power.
SPI Operation
13-sint
In the SPI system the 8-bit data register in the master and the 8-bit data
register in the slave are linked to form a distributed 16-bit register. When
a data transfer operation is performed, this 16-bit register is serially
shifted eight bit positions by the SCK clock from the master so the data
Serial Interface
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MC68HC912BD32 Rev 1.0