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| MC68HC912BD32 Datasheet, PDF (234/292 Pages) Freescale Semiconductor, Inc – Advance Information | |||
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Freescale Semiconductor, Inc.
Analog to Digital Converter
ATD Mode Operation
STOP â causes all clocks to halt (if the S bit in the CCR is zero). The
system is placed in a minimum-power standby mode. This aborts any
conversion sequence in progress. During STOP recovery, the ATD must
delay for the STOP recovery time (tSR) before initiating a new ATD
conversion sequence.
WAIT â ATD conversion continues unless AWAI bit in ATDCTL2
register is set.
BDM â Debug options available as set in register ATDCTL3.
USER â ATD continues running unless ADPU is cleared.
ADPU â ATD operations are stopped if ADPU = 0, but registers are
accessible.
MC68HC912BD32 Rev 1.0
Analog to Digital Converter
For More Information On This Product,
Go to: www.freescale.com
12-adc
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