MC68HC912BD32 Datasheet, PDF (51/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Operating Modes and Resource Mapping
Background Debug Mode
most cases will remain cycle deterministic. Refer to 16 Development
Support for more details on BDM.
MODE — Mode Register
Bit 7
6
5
4
3
2
1
SMODN MODB MODA ESTR
IVIS EBSWAI
0
RESET:
1
0
1
1
0
0
–
RESET:
1
1
1
1
0
0
–
RESET:
0
0
1
1
1
0
–
RESET:
0
1
1
1
1
0
–
RESET:
0
1
0
1
1
0
–
RESET:
1
0
0
1
0
0
–
RESET:
0
0
0
1
1
0
–
Bit 0
EME
0
0
1
1
1
0
1
$000B
Normal Exp
Narrow
Normal Exp
Wide
Special Exp
Narrow
Special Exp
Wide
Peripheral
Normal
Single Chip
Special
Single Chip
MODE controls the MCU operating mode and various configuration
options. This register is not in the map in peripheral mode
SMODN, MODB, MODB — Mode Select Special, B and A
These bits show the current operating mode and reflect the status of
the BKGD, MODB and MODA input pins at the rising edge of reset.
Read anytime. SMODN may only be written if SMODN = 0 (in special
modes) but the first write is ignored; MODB, MODA may be written
once if SMODN = 1; anytime if SMODN = 0, except that special
peripheral and reserved modes cannot be selected.
ESTR — E Clock Stretch Enable
Determines if the E Clock behaves as a simple free-running clock or
as a bus control signal that is active only for external bus cycles.
ESTR is always one in expanded modes since it is required for
address demultiplexing and must follow stretched cycles.
0 = E never stretches (always free running).
1 = E stretches high during external access cycles and low during
non-visible internal accesses.
5-mode
Operating Modes and Resource Mapping
For More Information On This Product,
Go to: www.freescale.com
MC68HC912BD32 Rev 1.0