MC68HC912BD32 Datasheet, PDF (214/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Byteflight™ Module
General Interrupt
Enable Register
(GIER)
The General Interrupt Enable Register allows to enable/disable the
different interrupt sources for the general interrupt request. A hard or soft
reset will clear the register.
GIER
R
$xx09
W
H/S-RESET
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
TXIE
OVRNIE
ERRIE
SYNEIE SYNLIE
ILLPIE LOCKIE*
0
0
0
0
0
0
0
Figure 45 General Interrupt Enable Register (GIER)
BIT 0
WAKEIE
0
TXIE — Transmit Interrupt Enable
1 = A transmit event will result in a general interrupt.
0 = No interrupt will be generated from this event.
OVRNIE — Receive FIFO Overrun Interrupt Enable
1 = A Receive FIFO overrun event will result in a general interrupt.
0 = No interrupt will be generated from this event.
ERRIE — Message Format Error (CRC or Frame) Interrupt Enable
1 = A Message Format Error will result in a general interrupt.
0 = No interrupt will be generated from this event.
SYNEIE — SYNC Pulse Too Early Error Interrupt Enable
1 = A SYNC pulse too early error will result in a general interrupt.
0 = No interrupt will be generated from this event.
SYNLIE — SYNC Pulse Lost Error Interrupt Enable
1 = A SYNC pulse lost error will result in a general interrupt.
0 = No interrupt will be generated from this event.
ILLPIE — Illegal Pulse Error Interrupt Enable
1 = An illegal pulse error will result in a general interrupt.
0 = No interrupt will be generated from this event.
MC68HC912BD32 Rev 1.0
Byteflight™ Module
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44-sibus