MC68HC912BD32 Datasheet, PDF (149/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Serial Interface
Serial Communication Interface (SCI)
MCLK
BAUD RATE
CLOCK
SCI TRANSMITTER
MSB
LSB
DIVIDER
Rx Baud Rate
PARITY
GENERATOR
10-11 BIT SHIFT REG
TxD BUFFER/SC0DRL
SC0BD/SELECT
Tx Baud Rate
TxD
PS1
SC0CR1/SCI CTL 1
TxMTR CONTROL
DATA BUS
SC0CR2/SCI CTL 2
SC0SR1/INT STATUS
RxD
PS0
INT REQUEST LOGIC
TO
INTERNAL
LOGIC
PARITY
DETECT
DATA RECOVERY
SCI RECEIVER
MSB
LSB
10-11 BIT SHIFT REG
TxD BUFFER/SC0DRL
SC0CR1/SCI CTL 1
WAKE-UP LOGIC
SC0SR1/INT STATUS
SC0CR2/SCI CTL 2
INT REQUEST LOGIC
Figure 20 Serial Communications Interface Block Diagram
Data Format
The serial data format requires the following conditions:
• An idle-line in the high state before transmission or reception of a
message.
• A start bit (logic zero), transmitted or received, that indicates the
start of each character.
3-sint
MC68HC912BD32 Rev 1.0
Serial Interface
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