MC68HC912BD32 Datasheet, PDF (65/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Bus Control and Input/Output
Registers
NECLK — No External E Clock
In expanded modes, writes to this bit have no effect. E clock is
required for de-multiplexing the external address; NECLK will remain
zero in expanded modes. NECLK can be written once in normal single
chip mode and can be written anytime in special single chip mode.
The bit can be read anytime.
0 = PE4 is the external E-clock pin subject to the following
limitation: In single-chip modes, PE4 is general-purpose I/O
unless NECLK = 0 and either IVIS = 1 or ESTR = 0. A 16-bit
write to PEAR:MODE can configure all three bits in one
operation.
1 = PE4 is a general-purpose I/O pin.
LSTRE — Low Strobe (LSTRB) Enable
Normal: write once; Special: write anytime except the first time. Read
anytime. This bit has no effect in single-chip modes or normal
expanded narrow mode.
0 = PE3 is a general-purpose I/O pin.
1 = PE3 is configured as the LSTRB bus-control output, provided
the MCU is not in single chip or normal expanded narrow
modes.
LSTRB is used during external writes. After reset in normal expanded
mode, LSTRB is disabled. If needed, it should be enabled before
external writes. External reads do not normally need LSTRB because
all 16 data bits can be driven even if the MCU only needs 8 bits of
data.
TAGLO is a shared function of the PE3/LSTRB pin. In special
expanded modes with LSTRE set and the BDM instruction tagging
on, a zero at the falling edge of E tags the instruction word low byte
being read into the instruction queue.
RDWE — Read/Write Enable
Normal: write once; Special: write anytime except the first time. Read
anytime. This bit has no effect in single-chip modes.
0 = PE2 is a general-purpose I/O pin.
1 = PE2 is configured as the R/W pin. In single chip modes, RDWE
has no effect and PE2 is a general-purpose I/O pin.
7-bus
Bus Control and Input/Output
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MC68HC912BD32 Rev 1.0