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MC68HC912BD32 Datasheet, PDF (257/292 Pages) Freescale Semiconductor, Inc – Advance Information
Freescale Semiconductor, Inc.
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Instruction Tagging
BRKAL — Breakpoint Address Register, Low Byte
$0023
Bit 7
6
5
4
3
2
1
Bit 0
Bit 7
6
5
4
3
2
1
Bit 0
RESET:
0
0
0
0
0
0
0
0
These bits are used to compare against the least significant byte of the
address bus. These bits may be excluded from being used in the match
if BK0ALE = 0.
BRKDH — Breakpoint Data Register, High Byte
Bit 7
6
5
4
3
2
Bit 15
14
13
12
11
10
RESET:
0
0
0
0
0
0
$0024
1
Bit 0
9
Bit 8
0
0
These bits are compared to the most significant byte of the data bus or
the most significant byte of the address bus in dual address modes.
BKEN[1:0], BKDBE, and BKMBH control how this byte will be used in the
breakpoint comparison.
BRKDL — Breakpoint Data Register, Low Byte
$0025
Bit 7
6
5
4
3
2
1
Bit 0
Bit 7
6
5
4
3
2
1
Bit 0
RESET:
0
0
0
0
0
0
0
0
These bits are compared to the least significant byte of the data bus or
the least significant byte of the address bus in dual address modes.
BKEN[1:0], BKDBE, BK1ALE, and BKMBL control how this byte will be
used in the breakpoint comparison.
Instruction Tagging
The instruction queue and cycle-by-cycle CPU activity can be
reconstructed in real time or from trace history that was captured by a
logic analyzer. However, the reconstructed queue cannot be used to
stop the CPU at a specific instruction, because execution has already
23-dev
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MC68HC912BD32 Rev 1.0