MC68HC912BD32 Datasheet, PDF (264/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Preliminary Electrical Characteristics
Table 71 Analog Converter Characteristics (Operating)
V_DD = 5.0 Vdc ±5%, V_SS = 0 Vdc, T_A = T_L to T_H, ATD Clock = 2 MHz, unless otherwise noted
Characteristic
Symbol
Min Typical
Max
Unit
8-Bit resolution⁽¹⁾
1 count
20
mV
8-Bit Differential non-linearity⁽²⁾
DNL
−0.5
+0.5 count
8-Bit Integral non-linearity⁽²⁾
INL
−1
+1
count
8- Bit Absolute error^(2),(3)
AE
−1
+1
count
10-Bit Resolution¹
1 count
5
mV
10-Bit Differential non-linearity⁽²⁾
DNL
-1
1
count
10-Bit Integral non-linearity⁽²⁾
INL
-2
2
count
10-Bit Absolute error^(2),(3)
AE
-2
2
count
Maximum source impedance
R_S
20
See note⁽⁴⁾ KΩ
1. V_RH − V_RL ≥ 5.12V; V_DDA − V_SSA = 5.12V
2. At V_REF = 5.12V, one 8-bit count = 20 mV, and one 10-bit count = 5mV.
3. These values include quantization error which is inherently 1/2 count for any A/D converter.
4. Maximum source impedance is application-dependent. Error resulting from pin leakage depends on junction leakage into
the pin and on leakage due to charge-sharing with internal capacitance.
Error from junction leakage is a function of external source impedance and input leakage current. Expected error in result
value due to junction leakage is expressed in voltage (V_ERRJ):
V_ERRJ = R_S × I_OFF
where I_OFF is a function of operating temperature. Charge-sharing effects with internal capacitors are a function of ATD
clock speed, the number of channels being scanned, and source impedance. For 8-bit conversions, charge pump leakage
is computed as follows:
V_ERRJ = .25pF × V_DDA × R_S × ATDCLK/(8 × number of channels)
MC68HC912BD32 Rev 1.0
Preliminary Electrical Characteristics
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