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MC68HC912BD32 Datasheet, PDF (50/292 Pages) Freescale Semiconductor, Inc – Advance Information
Freescale Semiconductor, Inc.
Operating Modes and Resource Mapping
Special Peripheral
Mode
The CPU is not active in this mode. An external master can control
on-chip peripherals for testing purposes. It is not possible to change to
or from this mode without going through reset. Background debugging
should not be used while the MCU is in special peripheral mode as
internal bus conflicts between BDM and the external master can cause
improper operation of both modes.
Background Debug Mode
Background debug mode (BDM) is an auxiliary operating mode that is
used for system development. BDM is implemented in on-chip hardware
and provides a full set of debug operations. Some BDM commands can
be executed while the CPU is operating normally. Other BDM
commands are firmware based, and require the BDM firmware to be
enabled and active for execution.
In special single-chip mode, BDM is enabled and active immediately out
of reset. BDM is available in all other operating modes, but must be
enabled before it can be activated. BDM should not be used in special
peripheral mode because of potential bus conflicts.
Once enabled, background mode can be made active by a serial
command sent via the BKGD pin or execution of a CPU12 BGND
instruction. While background mode is active, the CPU can interpret
special debugging commands, and read and write CPU registers,
peripheral registers, and locations in memory.
While BDM is active, the CPU executes code located in a small on-chip
ROM mapped to addresses $FF00 to $FFFF; BDM control registers are
accessible at addresses $FF00 to $FF06. The BDM ROM replaces the
regular system vectors while BDM is active. While BDM is active, the
user memory from $FF00 to $FFFF is not in the map except through
serial BDM commands.
BDM allows read and write access to internal memory-mapped registers
and RAM, and read access to EEPROM and Flash EEPROM without
interrupting the application code executing in the CPU. This
non-intrusive mode uses dead bus cycles to access the memory and in
MC68HC912BD32 Rev 1.0
Operating Modes and Resource Mapping
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