MC68HC912BD32 Datasheet, PDF (256/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
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1 = R/W is used in comparisons
BK1RW — R/W Compare Value
When BK1RWE = 1, this bit determines the type of bus cycle to
match.
0 = A write cycle will be matched
1 = A read cycle will be matched
BK0RWE — R/W Compare Enable
Enables the comparison of the R/W signal to further specify what
causes a match. This bit is not useful in program breakpoints.
0 = R/W is not used in the comparisons
1 = R/W is used in comparisons
BK0RW — R/W Compare Value
When BK0RWE = 1, this bit determines the type of bus cycle to match
on.
0 = Write cycle will be matched
1 = Read cycle will be matched
Table 63 Breakpoint Read/Write Control
BK1RWE BK1RW BK0RWE BK0RW
Read/Write Selected
–
–
0
X R/W is don’t care for full mode or dual mode BKP0
–
–
1
0 R/W is write for full mode or dual mode BKP0
–
–
1
1 R/W is read for full mode or dual mode BKP0
0
X
–
– R/W is don’t care for dual mode BKP1
1
0
–
– R/W is write for dual mode BKP1
1
1
–
– R/W is read for dual mode BKP1
BRKAH — Breakpoint Address Register, High Byte
Bit 7
6
5
4
3
2
Bit 15
14
13
12
11
10
RESET:
0
0
0
0
0
0
$0022
1
Bit 0
9
Bit 8
0
0
These bits are used to compare against the most significant byte of the
address bus.
MC68HC912BD32 Rev 1.0
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