MC68HC912BD32 Datasheet, PDF (85/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
EEPROM
EEPROM
Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
EEPROM Programmer’s Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
EEPROM Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Introduction
The MC68HC912BD32 EEPROM nonvolatile memory is arranged in a
16-bit configuration. The EEPROM array may be read as either bytes,
aligned words or misaligned words. Access times is one bus cycle for
byte and aligned word access and two bus cycles for misaligned word
operations.
Programming is by byte or aligned word. Attempts to program or erase
misaligned words will fail. Only the lower byte will be latched and
programmed or erased. Programming and erasing of the user EEPROM
can be done in all modes.
Each EEPROM byte or aligned word must be erased before
programming. The EEPROM module supports byte, aligned word, row
(32 bytes) or bulk erase, all using the internal charge pump. Bulk erasure
of odd and even rows is also possible in test modes; the erased state is
$FF. The EEPROM module has hardware interlocks which protect
stored data from corruption by accidentally enabling the program/erase
voltage. Programming voltage is derived from the internal V_DD supply
with an internal charge pump.
1-eeprom
EEPROM
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MC68HC912BD32 Rev 1.0