MC68HC912BD32 Datasheet, PDF (53/292 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Operating Modes and Resource Mapping
Internal Resource Mapping
Internal Resource Mapping
The internal register block, RAM, Flash EEPROM and EEPROM have
default locations within the 64K byte standard address space but may be
reassigned to other locations during program execution by setting bits in
mapping registers INITRG, INITRM, and INITEE. During normal
operating modes these registers can be written once. It is advisable to
explicitly establish these resource locations during the initialization
phase of program execution, even if default values are chosen, in order
to protect the registers from inadvertent modification later.
Writes to the mapping registers go into effect between the cycle that
follows the write and the cycle after that. To assure that there are no
unintended operations, a write to one of these registers should be
followed with a NOP instruction.
If conflicts occur when mapping resources, the register block will take
precedence over the other resources; RAM, Flash EEPROM, or
EEPROM addresses occupied by the register block will not be available
for storage. When active, BDM ROM takes precedence over other
resources although a conflict between BDM ROM and register space is
not possible. Table 11 shows resource mapping precedence.
All address space not utilized by internal resources is by default external
memory.
Table 11 Mapping Precedence
Precedence
1
2
3
4
5
6
Resource
BDM ROM (if active)
Register Space
RAM
EEPROM
Flash EEPROM
External Memory
Register Block
Mapping
7-mode
After reset the 512 byte register block resides at location $0000 but can
be reassigned to any 2K byte boundary within the standard 64K byte
address space. Mapping of internal registers is controlled by five bits in
Operating Modes and Resource Mapping
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MC68HC912BD32 Rev 1.0