UPSD3354DV-40U6 Datasheet, PDF (57/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

UPSD33xx
Dual data pointers
11.2
Data Pointer Mode register, DPTM (86h)
The two “background” data pointers, DPTR0 and DPTR1, can be configured to
automatically increment, decrement, or stay the same after a MOVX instruction accesses
the DPTR register. Only the currently selected pointer will be affected by the increment or
decrement. This feature is controlled by the DPTM register defined in Table 15.
The automatic increment or decrement function is effective only for the MOVX instruction,
and not MOVC or any other instruction that uses the DTPR register.
11.2.1
Firmware example
The 8051 assembly code illustrated in Table 17 shows how to transfer a block of data bytes
from one XDATA address region to another XDATA address region. Auto-address
incrementing and auto-pointer toggling will be used.
Table 15. DPTM: Data Pointer Mode register (SFR 86h, reset value 00h)
Bit 7
) ^–
Bit 6
–
Bit 5
–
Bit 4
–
Bit 3
MD11
Bit 2
MD10
Bit 1
MD01
Bit 0
MD00
uct(s ^{Table 16. DPTM register bit definition}
d _Bit
Symbol
R/W
Definition
Pro ^7-4
–
–
Reserved
te ^{DPTR1 Mode Bits}
le ^{00: DPTR1 No Change}
o ^3-2
MD[11:10]
R,W 01: Reserved
s _{10: Auto Increment}
b _{11: Auto Decrement}
- ^O DPTR0 Mode Bits
) _{00: DPTR0 No Change}
t(s ^1-0
MD[01:00]
R,W 01: Reserved
c 10: Auto Increment
Obsolete ^{Produ 11: Auto Decrement}
Doc ID 9685 Rev 7
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