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UPSD3354DV-40U6 Datasheet, PDF (238/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic
PSD module
Figure 81. Recommended 6-pin JTAG connections
UPSD33xx
CIRCUIT
BOARD
UPSD33XX
100k
typical
JTAG
CONN.
TMS - PC0
TMS
TCK - PC1
TCK
I/O - PC2
GENERAL I/O - PC3
GENERAL I/O - PC4
TDI - PC5
TDI
JTAG
Programming
TDO - PC6
TDO or Test
GENERAL I/O - PC7
VCC(1,2)
Equipment
Connects Here
0.01
uct(s) RESETIN
GENERAL I/O
SIGNALS
µF
10k
GND
RST(3)
lete Prod DEBUG
100k
PUSH BUTTON
or ANY OTHER
RESET SOURCE
bso OPTIONAL
TEST POINT
- O AI09185c
t(s) 1. For 5 V UPSD33xx devices, pull-up resistors and VCC pin on the JTAG connector should be connected to 5 V system VDD.
2. For 3.3 V UPSD33xx devices, pull-up resistors and VCC pin on the JTAG connector should be connected to 3.3 V system
c VCC.
u 3. This signal is driven by an Open-Drain output in the JTAG equipment, allowing more than one source to activate
Obsolete Prod RESET_IN.
238/272
Doc ID 9685 Rev 7