UPSD3354DV-40U6 Datasheet, PDF (172/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

PSD module
UPSD33xx
27.2.3
Specifying the memory map with PSDsoft Express
The memory map example shown in Figure 52 is implemented using PSDsoft Express in a
point-and-click environment. PSDsoft Express will automatically generate Hardware
Definition Language (HDL) statements of the ABEL language for the DPLD, such as those
shown in Table 114 on page 172.
Specifying these equations using PSDsoft Express is very simple. For example, Figure 53
on page 173, shows how to specify the chip-select equation for the 16 Kbyte Flash memory
segment, fs4. Notice fs4 is on memory page 1. This specification process is repeated for all
other Flash memory segments, the SRAM, the csiop register block, and any external chip
select signals that may be needed.
Table 114. HDL statement example generated from PSDsoft for memory map
rs0 = ((address ≥ & (address ≤
^h0000)
^h1FFF));
csiop = ((address ≥ & (address ≤
^h2000)
^h20FF));
fs0 = ((address ≥ & (address ≤
) ^h0000)
^h3FFF));
t(s ^{fs1 = ((address ≥ & (address ≤}
^h4000)
^h7FFF));
uc fs2 = ((page == 0) & (address ≥ & (address ≤
d _^h8000)
^hBFFF));
ro ^{fs3 = ((page == 0) & (address ≥ & (address ≤}
P ^{^hC000)}
^hFFFF));
fs4 = ((page == 1) & (address ≥ & (address ≤
te _^h8000)
^hBFFF));
le _{fs5 = ((page == 1) & (address ≥ & (address ≤}
o_^hC000)
^hFFFF));
bs fs6 = ((page == 2) & (address ≥ & (address ≤
^h8000)
^hBFFF));
- ^O fs7 = ((page == 2) & (address ≥ & (address ≤
) ^hC000)
^hFFFF));
t(s ^{csboot0 = ((address ≥ & (address ≤}
^h8000)
^h9FFF));
uc csboot1 = ((address ≥ & (address ≤
d _^hA000)
^hBFFF));
ro csboot2 = ((address ≥ & (address ≤
P ^hC000)
^hDFFF));
te ^{csboot3 = ((address ≥ & (address ≤}
Obsole ^{^hE000)}
^hFFFF));
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Doc ID 9685 Rev 7