UPSD3354DV-40U6 Datasheet, PDF (43/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

UPSD33xx
Special function registers (SFR)
Table 5. SFR memory map with direct address and reset value (continued)
SFR
addr
SFR
(hex)
name
7
6
Bit name and <Bit Address>
5
4
3
2
1
0
Reset
value
(hex)
Reg. descr.
with link
B7
IPA
PADC
PSPI
PPCA
PS1
–
–
PI2C
–
00
Table 25 on
page 66
B8⁽¹⁾
IP
–
–
PT2
<BDh>
PS0
<BCh>
PT1
<BBh>
PX1
<BAh>
PT0
PX0
<B9h> <B8h>
00
Table 23 on
page 66
B9
RESERVED
BA PCACL1
BB PCACH1
PCACL1[7:0]
PCACH1[7:0]
00
Table 98 on
00
page 154
BC PCACON1
–
EN_PCA EOVF1 PCA_IDL
–
–
CLK_SEL[1:0]
00
Table 105 on
page 160
BD
TCMMODE
3
EINTF
E_COMP CAP_PE CAP_NE MATCH TOGGLE
PWM[1:0]
00
BE
TCMMODE
4
EINTF
E_COMP CAP_PE CAP_NE MATCH TOGGLE
PWM[1:0]
00
Table 109 on
page 162
) ^BF
TCMMODE
5
EINTF
E_COMP CAP_PE CAP_NE MATCH TOGGLE
PWM[1:0]
00
t(s C0⁽¹⁾
P4
P4.7
<C7h>
P4.6
<C6h>
P4.5
<C5h>
P4.4
<C4h>
P4.3
<C3h>
P4.2
<C2h>
P4.1
P4.0
<C1h> <C0h>
FF
Table 37 on
page 81
duc ^C1
CAPCOML
3
CAPCOML3[7:0]
00
ro _C2
CAPCOMH
3
CAPCOMH3[7:0]
00
te ^{P C3}
CAPCOML
4
ole ^C4
CAPCOMH
4
CAPCOML4[7:0]
CAPCOMH4[7:0]
00
Table 98 on
00
page 154
bs _C5
CAPCOML
5
CAPCOML5[7:0]
00
- ^O C6
CAPCOMH
5
CAPCOMH5[7:0]
00
t(s) ^C7
PWMF1
PWMF1[7:0]
00
uc ^{C8(1) T2CON}
TF2
<CFh>
EXF2
<CEh>
RCLK
<CDh>
TCLK
<CCh>
EXEN2
<CBh>
TR2
<CAh>
C/T2
<C9h>
CP/RL
2
<C8h>
00
Table 58 on
page 100
rod ^C9
RESERVED
CA RCAP2L
RCAP2L[7:0]
00
P _{CB RCAP2H}
te _CC
TL2
RCAP2H[7:0]
TL2[7:0]
00
Section 20.1
00
on page 94
ole CD
TH2
TH2[7:0]
00
Obs^{CE IRDACON}
–
IRDA_EN BIT_PULS CDIV4
CDIV3 CDIV2 CDIV1 CDIV0 0F
Table 68 on
page 120
D0⁽¹⁾
PSW
CY
<D7h>
AC
<D6h>
F0
<D5h>
RS[1:0]
<D4h, D3h>
OV
<D2h>
–
P
<D0>
00
Section 7.7
on page 38
D1
RESERVED
D2 SPICLKD
SPICLKD[5:0]
–
–
04
Table 89 on
page 148
D3 SPISTAT
–
–
–
BUSY
TEISF RORISF TISF
RISF
02
Table 91 on
page 149
Doc ID 9685 Rev 7
43/272