UPSD3354DV-40U6 Datasheet, PDF (52/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

UPSD33xx instruction set summary
UPSD33xx
Table 7.
Logical instruction set (continued)
Mnemonic⁽¹⁾
and use
Description
Length/cycles
XRL
A, @Ri
Exclusive-OR indirect SRAM
to ACC
1 byte/1 cycle
XRL
A, #data
Exclusive-OR immediate data
to ACC
2 byte/1 cycle
XRL
direct, A
Exclusive-OR ACC to direct
byte
2 byte/1 cycle
XRL
direct, #data
Exclusive-OR immediate data
to direct byte
3 byte/2 cycle
CLR
A
Clear ACC
1 byte/1 cycle
CPL
A
Compliment ACC
1 byte/1 cycle
RL
A
Rotate ACC left
1 byte/1 cycle
) ^RLC
A
Rotate ACC left through the
carry
t(s _RR
A
Rotate ACC right
duc ^RRC
A
Rotate ACC right through the
carry
ro _{1. All mnemonics copyrighted ©Intel Corporation 1980.}
te ^P _{Table 8.}
Obsole MOV
- _MOV
t(s) ^MOV
c _MOV
du MOV
ro _MOV
te ^{P MOV}
le_MOV
so MOV
Ob ^MOV
Data transfer instruction set
Mnemonic⁽¹⁾
and use
Description
A, Rn
A, direct
Move register to ACC
Move direct byte to ACC
A, @Ri
A, #data
Rn, A
Rn, direct
Rn, #data
direct, A
Move indirect SRAM to ACC
Move immediate data to ACC
Move ACC to register
Move direct byte to register
Move immediate data to
register
Move ACC to direct byte
direct, Rn
direct, direct
Move register to direct byte
Move direct byte to direct
1 byte/1 cycle
1 byte/1 cycle
1 byte/1 cycle
Length/cycles
1 byte/1 cycle
2 byte/1 cycle
1 byte/1 cycle
2 byte/1 cycle
1 byte/1 cycle
2 byte/2 cycle
2 byte/1 cycle
2 byte/1 cycle
2 byte/2 cycle
3 byte/2 cycle
MOV
direct, @Ri
Move indirect SRAM to direct
byte
2 byte/2 cycle
MOV
direct, #data
Move immediate data to
direct byte
3 byte/2 cycle
MOV
@Ri, A
Move ACC to indirect SRAM
1 byte/1 cycle
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Doc ID 9685 Rev 7