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UPSD3354DV-40U6 Datasheet, PDF (211/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic
UPSD33xx
PSD module
Table 138. MCU I/O Mode Port C Data Out register (address = csiop + offset 12h)(1)(2)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PC7
N/A
N/A
PC4
PC3
PC2
N/A
N/A
1. For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’
2. Default state of register is 00h after reset or power-up
Table 139. MCU I/O Mode Port D Data Out register (address = csiop + offset 13h)(1)(2)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
N/A
N/A
N/A
N/A
N/A
PD2(3)
PD1
N/A
1. For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’
2. Default state for register is 00h after reset or power-up
3. Not available on 52-pin UPSD33xx devices
Table 140. MCU I/O Mode Port A Direction register (address=csiop+offset 06h)(1)(2)(3)
) Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
t(s PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
uc 1. Port A not available on 52-pin UPSD33xx devices
rod 2. For each bit, 1 = out from UPSD33xx port pin1, 0 = in to PSD33xx port pin
3. Default state for register is 00h after reset or power-up
te P Table 141. MCU I/O Mode Port B Direction Inregister (address=csiop+offset 07h)(1)(2)
ole Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
bs PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
O 1. For each bit, 1 = out from UPSD33xx port pin1, 0 = in to PSD33xx port pin
- 2. Default state for register is 00h after reset or power-up
ct(s) Table 142. MCU I/O Mode Port C Direction register (address = csiop + offset 14h)(1)(2)
u Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
rod PC7
N/A
N/A
PC4
PC3
PC2
N/A
N/A
P 1. For each bit, 1 = out from UPSD33xx port pin1, 0 = in to PSD33xx port pin
te2. Default state for register is 00h after reset or power-up
oleTable 143. MCU I/O Mode Port DDirection register (address = csiop + offset 15h)(1)(2)
Obs Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
N/A
N/A
N/A
N/A
N/A
PD2(3)
PD1
N/A
1. For each bit, 1 = out from UPSD33xx port pin1, 0 = in to PSD33xx port pin
2. Default state for register is 00h after reset or power-up
3. Not available on 52-pin UPSD33xx devices
Doc ID 9685 Rev 7
211/272