UPSD3354DV-40U6 Datasheet, PDF (155/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

UPSD33xx
Programmable counter array (PCA) with PWM
Table 100. CCON2 register bit definition
Bit
Symbol
R/W
Definition
PCA0 Clock Enable
4
PCA0CE
R/W 0 = PCA0CLK is disabled
1 = PCA0CLK is enabled (default)
PCA0 Prescaler
PCA0PS
3:0
[3:0]
R/W f_PCA0CLK = f_OSC / (2 ^ PCA0PS[3:0])
Divisor range: 1, 2, 4, 8, 16... 16384, 32768
Table 101. CCON3 register (SFR 0FCh, Reset Value 10h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
–
–
–
PCA1CE PCA1PS3 PCA1PS2 PCA1PS1 PCA1PS0
Table 102. CCON3 register bit definition
) _Bit
Symbol
R/W
Definition
t(s _{PCA1 Clock Enable}
uc 4
PCA1CE
R/W 0 = PCA1CLK is disabled
d _{1 = PCA1CLK is enabled (default)}
ro _{PCA1 Prescaler}
P PCA1PS
te ^3:0
[3:0]
R/W f_PCA1CLK = f_OSC / (2 ^ PCA1PS[3:0])
Divisor range: 1, 2, 4, 8, 16... 16384, 32768
t(s) ^{- Obsole 26.3}
Operation of TCM modes
Each of the TCM in a PCA block supports four modes of operation. However, an exception is
when the TCM is configured in PWM mode with programmable frequency. In this mode, all
TCM in a PCA block must be configured in the same mode or left to be not used.
lete ^{Produc 26.4}
Capture mode
The CAPCOM registers in the TCM are loaded with the counter values when an external pin
input changes state. The user can configure the counter value to be loaded by positive
edge, negative edge or any transition of the input signal. At loading, the TCM can generate
an interrupt if it is enabled.
Obso ^{26.5 Timer mode}
The TCM modules can be configured as software timers by enable the comparator. The
user writes a value to the CAPCOM registers, which is then compared with the 16-bit
counter. If there is a match, an interrupt can be generated to CPU.
Doc ID 9685 Rev 7
155/272