UPSD3354DV-40U6 Datasheet, PDF (162/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

Programmable counter array (PCA) with PWM
UPSD33xx
26.13
TCM interrupts
There are 8 TCM interrupts: 6 match or capture interrupts and two counter overflow
interrupts. The 8 interrupts are “ORed” as one PCA interrupt to the CPU.
By the nature of PCA application, it is unlikely that many of the interrupts occur
simultaneously. If they do, the CPU has to read the interrupt flags and determine which one
to serve. The software has to clear the interrupt flag in the Status register after serving the
interrupt.
Table 109. TCMMODE0 - TCMMODE5 (6 registers, Reset Value 00h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EINTF E_COMP CAP_PE CAP_NE MATCH TOGGLE
PWM[1:0]
Table 110. TCMMODEx register bit definition
Bit
Symbol
Function
t(s) ⁷
EINTF
1 - Enable the interrupt flags (INTF) in the Status register to generate an
interrupt.
c ⁶
E_COMP 1 - Enable the comparator when set
u ₅
CAP_PE 1 - Enable Capture mode, a positive edge on the CEXn pin.
rod ⁴
CAP_NE 1 - Enable Capture mode, a negative edge on the CEXn pin.
P ₃
MATCH 1 - A match from the comparator sets the INTF bits in the Status register.
te 2
TOGGLE 1 - A match on the comparator results in a toggling output on CEXn pin.
le _{01 Enable PWM mode (x8), fixed frequency. Enable the CEXn pin as a}
o _{PWM output.}
Obs ^1-0
PWM[1:0]
10 Enable PWM mode (x8) with programmable frequency. Enable the
CEXn pin as a PWM output.
- 11 Enable PWM mode (x10 or x16), fixed frequency. Enable the CEXn pin
Obsolete ^{Product(s) as a PWM output.}
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Doc ID 9685 Rev 7