UPSD3354DV-40U6 Datasheet, PDF (174/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

PSD module
UPSD33xx
27.2.5
Note:
Alternative mapping schemes
Here are more possible memory maps for the UPSD3333.
Mapping examples would be slightly different for UPSD3312, UPSD3334, and UPSD3354
because of the different sizes of individual Flash memory sectors and SRAM as defined in
Table 119 on page 193.
● Figure 54 on page 174 Place the larger main Flash memory into program space, but
split the secondary Flash in half, placing two of it’s sectors into XDATA space and
remaining two sectors into program space. This method allows the designer to put IAP
code (or boot code) into two sectors of secondary Flash in program space, and use the
other two secondary Flash sectors for data storage, such as EEPROM emulation in
XDATA space.
● Figure 55 on page 175 Place both the Main and secondary Flash memories into
program space for maximum code storage, with no Flash memory in XDATA space.
Figure 54. Mapping: split second Flash in half
t(s) ^FFFFh
8032 PROGRAM
SPACE (PSEN)
Page Page Page Page
0
1
2
3
8032 XDATA SPACE
(RD and WR)
Page X
FFFFh
uc fs1 fs3 fs5 fs7
d ^{16KB 16KB 16KB 16KB}
ro ^C000h
te ^P _8000h
fs0
16KB
fs2
16KB
fs4 fs6
16KB 16KB
sole Nothing Mapped
b _4000h
O csboot1, 8KB
- _2000h ^{Common Memory to All Pages}
) csboot0, 8KB
Obsolete ^{Product(s 0000h Common Memory to All Pages}
System I/O
8000h
csboot3
8KB
6000h
csboot2
8KB _4000h
System I/O _2100h
csiop, 256B _2000h
rs0, 8KB
0000h
AI09174
174/272
Doc ID 9685 Rev 7