UPSD3354DV-40U6 Datasheet, PDF (202/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

PSD module
UPSD33xx
logic where more product terms may be available. The following list summarizes how
product terms are allocated to each OMC, as shown in Table 122 on page 203.
● MCELLAB0-MCELLAB7 each have three native product terms and may borrow up to
six more
● MCELLBC0-MCELLBC3 each have four native product terms and may borrow up to
five more
● MCELLBC4-MCELLBC7 each have four native product terms and may borrow up to six
more.
Native product terms come from the AND-OR Array. Each OMC may borrow product terms
only from certain other OMCs, if they are not in use. Product term allocation does not add
any propagation delay to the logic. The fitter report generated by PSDsoft Express will show
any PT allocation that has occurred.
If an equation requires more product terms than are available to it through PT allocation,
then “external” product terms are required, which consumes other OMCs. This is called
product term expansion and also happens automatically in PSDsoft Express as needed. PT
expansion causes additional propagation delay because an additional OMC is consumed by
the expansion process and it’s output is rerouted (or fed back) into the AND-OR array. The
) _{user can examine the fitter report generated by PSDsoft Express to see resulting PT}
t(s ^{allocation and PT expansion (expansion will have signal names, such as ‘*.fb_0’ or ‘*.fb_1’).}
c PSDsoft Express will always try to fit the logic design first by using PT allocation, and if that
u _{is not sufficient then PSDsoft Express will use PT expansion.}
rod ^{Product term expansion may occur in the DPLD for complex chip select equations for Flash}
memory sectors and for SRAM, but this is a rare occurrence. If PSDsoft Express does use
P _{PT expansion in the DPLD, it results in an approximate 15ns additional propagation delay for}
te _{that chip select signal, which gives 15ns less time for the memory to respond. Be aware of}
le this and consider adding a wait state to the 8032 bus access (using the SFR named,
o _{BUSCON), or lower the 8032 clock frequency to avoid problems with memory access time.}
bs _{Figure 66. OMC allocator}
- ^O _{Port A pins}
) (80-pin pkg only)
t(s ^{7 6 5 4 3 2 1 0}
Port B pins
76543210
PortC pins
7 * *432 * *
roduc _{7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0}
Obsolete ^{POMC Bank AB (MCELLAB0-7) OMC Bank BC (MCELLBC0-7)}
* = Used for JTAG,
pin not available
to GPLD
AI09177
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Doc ID 9685 Rev 7