UPSD3354DV-40U6 Datasheet, PDF (243/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

UPSD33xx
AC/DC parameters
Figure 85.
PLD I_CC /frequency consumption (3 V range)
60
V_CC = 3V
50
TURBO ^{ON (100%)}
40
30
20
TURBO ^{ON (25%)}
PT 100%
10
TURBO ^OFF
PT 25%
0
0
5
10
15
20
25
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
AI03100
Table 159. PSD module example, typ. power calculation at V_CC = 5.0 V (Turbo mode Off)
t(s) ^Conditions
c MCU Clock Frequency
du ^{Highest Composite PLD input frequency}
= 12 MHz
ro (Freq PLD)
P _{MCU ALE frequency (Freq ALE)}
te _{% Flash memory Access}
le _{% SRAM access}
= 8 MHz
= 2 MHz
= 80%
= 15%
t(s) ^{- Obso Operational modes}
% I/O access
% Normal
% Power-down mode
= 5% (no additional power above base)
= 40%
= 60%
c Number of product terms used
du ^{(from fitter report)}
ro% of total product terms
P _{Turbo mode}
= 45 PT
= 45/182 = 24.7%
= Off
te _{Calculation (using typical values)}
Obsole ^{ICC total}
= I_CC(MCUactive) x %MCUactive + I_CC(PSDactive) x %PSDactive + I_PD(pwrdown) x
%pwrdown
Doc ID 9685 Rev 7
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